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CCSTA14N40
N-Type, ThinPakTM Preliminary Data Sheet
Description
This current controlled Solidtron (CCS) discharge switch is an ntype Thyristor in a high performance ThinPakTM package. The device gate is similar to that found on a traditional GTO Thyristor. The CCS features the high peak current capability and low Onstate voltage drop common to SCR thyristors combined with high di/dt capability. This semiconductor is intended to be a solid state replcement for spark or gas type devices commonly used in pulse power applications. The ThinPakTM Package is a perforated, metalized ceramic substrate attached to the silicon using 302oC solder. All exterior metal surfaces are tinned with 63pb/37sn solder providing the user with a circuit ready part. It's small size and low profile make it extremely attractive for high di/dt applications where stray series inductance must be kept to a minimum.
Package Cathode contacts Gate contact
Anode Bond Area on bottom
ThinPakTM
Anode (A)
Schematic Symbol
Features
l 4000V Peak Off-State Voltage l 7 kA Repetitive Ipk Capability l 30 KA/uS di/dt Capability l Low On-State Voltage l Low trigger current l Low Inductance Package Gate (G)
Cathode (K)
Absolute Maximum Ratings
SYMBOL Peak Off-State Voltage Peak Reverse Voltage Off-State Rate of Change of Voltage Immunity* Continuous Anode Current at Tj = 125 oC Repetitive Peak Anode Current (Pulse Width=10uSec) Nonrepetitive Peak Anode Current (Pulse Width=10uSec) Rate of Change of Current Peak Gate Current (1 uS) Max. Reverse Gate-Cathode Voltage Maximum Junction Temperature Maximum Soldering Temperature (Installation) VDRM VRRM dv/dt IA110 IASM IASM dI/dt
IGpk
VALUE 4 -5 1 100 10.0 14 30 100 -9 125 260
UNITS kV V kV/uSec A kA kA kA/uSec A V
o o
VGR TJM
C
C
This SILICON POWER product is protected by one or more of the following U.S. Patents:
5,521,436 5,585,310 5,248,901 5,366,932 5,497,013 5,532,635 5,446,316 5,557,656 5,564,226 5,517,058 4,814,283 5,135,890 5,105,536 5,777,346 5,446,316 5,577,656 5,473,193 5,166,773 5,209,390 5,139,972 5,103,290 5,028,987 5,304,847 5,569,957 4,958,211 5,111,268 5,260,590 5,350,935 5,640,300 5,184,206 5,206,186 5,757,036 5,777,346 5,995,349 4,801,985 4,476,671 4,857,983 4,888,627 4,912,541 5,424,563 5,399,892 5,468,668 5,082,795 4,980,741 4,941,026 4,927,772 4,739,387 4,648,174 4,644,637 4,374,389 4,750,666 4,429,011 5,293,070
Preliminary Data Sheet - Product Status : First Production : This data sheet contains preliminary data . Supplementary data will be published at a later date. Silicon Power reserves the right to make changes at any time without notice. * Requires a 10 ohm gate to cathode shorting resistor.
CCSTA14N40
N-Type, ThinPakTM Preliminary Data Sheet
Performance Characteristics
Parameters Anode to Cathode Breakdown Voltage Anode-Cathode Off-State Current TJ=25oC unless otherwise specified Symbol VDR ID Test Conditions VGK=0, IA=1mA VGK=0V, VAK=4000V TJ=25 C TJ=125 C Turn-On Threshold Current Gate-Cathode Leakage Current Anode-Cathode On-State Voltage VGK(TH) IGK(lkg) VT VAK=VGK, IAK=1mA , see Note 1 VGK=0V, see Note 1 IT=400A Ig = 500 mA Turn-on Delay Time Pk Rate of Change of Current (measured) Peak Anode Current tD(ON) dI/dt IP 0.75 uF Capacitor discharge VAK = 3.95 kV Rgk = 10 ohms, Ls = 90 nH Gate di/dt =100 A/us TJ=25oC TJ=25 C TJ=125 C
o o o o
Measurements Min. 4 <50 100 5 20 1.7 1.9 200 30 10 100 800 Typ. Max. Units kV uA uA mA uA V V ns kA/us kA
Notes: 1. Measurements made with a 10 Ohm shorting resistor connected between the gate and cathode. 2. Case Exterior Assummed to be 0.002" of 63sn/37pb solder applied directly to cathode bond area of thinPak.
Typical Performance Curves (unless otherwise specified)
Figure 1. Measured Low current On-State Characteristics.
Figure 2. Predicted high current On-State Characteristics.
CCSTA14N40
N-Type, ThinPakTM Preliminary Data Sheet
Typical Performance Curves (Continued)
Figure 3. Predicted I2t data for various number of discharge cycles. Pulses are assumed rectangular. The device junction temperature TJ is assumed to be at 25oC before each discharge event. Test Circuit
l LSERIES(TOTAL) is caculated using 1 / (f 2)2C where f = frequency of IA when using CCSTA14N40 for circuit set up and calibration. l RSENSE is a calibrated Current Viewing Resistor (CVR)
IK VAK IG
0 Ref
l The waveform shown is representative of one produced using a very low inductance circuit (<100nH) as shown in the circuit diagram using the CCSTA14N40 Solidtron. The supply voltage (Vs) in this example was 4kV. Ik peaked at 10kA and the peak gate current Ig is 500mA.
Figure 4. Typical test circuit and waveforms.
CCSTA14N40
N-Type, ThinPakTM Preliminary Data Sheet
Application Notes
1. The CCSTA14N40 uses an undersized ceramic "lid" which exposes the sensitive junction termination edge (JTE) of the device. The user is required to clean and encapsulate the device (recomend HYSOL FP4651) prior to applying high voltage. This prevents debris and contaminants from compromising the JTE. 2. Use of a seperate gate return path instead of the cathode power contact is recomended to minimize the effects of rapidly changing Anode-Cathode currents. Figure 5. A suggested gate drive circuit.
3. For applications that require high voltage blocking for an extended period of time at high temperature (>85oC), it is recomended that the device VDR be derated to 2kV. 4. Shorting resistor RGK is application specific. It can control the gate drive requirements and some device properties. However, RGK = 10 Ohms satisfies most application requirements.
Package Dimensions (All units in Inches)
Packaging and Handling
1. All metal surfaces are tinned using 63pb/37sn solder. 2. Installation reflow temperature should not exceed 260oC or internal package degradation may result. 3. Package may be cooled from either top or bottom. 4. Proper handling procedures must be observed to prevent electrostatic discharge which may result in permanent damage to the gate of the device.

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